The interconnect technology peripheral component interconnect Express (PCIe), was conceived as the heir apparent to the peripheral component interconnect (PCI) technology and utilizes existing PCI programming concepts, but bases it on a much faster full duplex, multi-lane, point to point serial physical-layer communications protocol. The PCIe protocol may be enabled to transfer data at about 250 MB/s per lane, for example.
The PCIe physical layer comprises of a network of serial interconnects like twisted pair Ethernet. A single hub with a plurality of pins may be utilized on the mainboard in order to allow switching and parallelism. The serial interconnects may be grouped in order to provide higher bandwidth. A multi-lane serial design may also be utilized to increase flexibility as a single lane may be provided for slow devices with a relatively small number of pins while more lanes may be provided for fast devices.
The PCIe link may be built around dedicated unidirectional couples of serial, point-to-point connections known as lanes, for example, in contrast to a PCI connection, which is a bus-based system where all the devices may share the same bidirectional parallel bus. The PCIe is a layered protocol that comprises a transaction layer, a data link layer, and a physical layer. The physical layer may be further divided into a logical sublayer and an electrical sublayer. The logical sublayer may be divided into a physical coding sublayer (PCS) and a media access control (MAC) sublayer.
At the electrical level, each lane may utilize two unidirectional low voltage differential signaling (LVDS) pairs at about 2.5 Gbit/s, for example. A connection between any two PCIe devices may be referred to as a link, and may be generated from a combination of one or more lanes. The PCIe devices may be enabled to support single-lane links or wider links. The PCIe protocol enables communication of control messages, including interrupts, over the same links used for data packets.
The data link layer may be enabled to implement sequencing of transaction layer packets (TLPs) that may be generated by the transaction layer. The data link layer may enable data protection via a cyclic redundancy check code (CRC), and an acknowledgement protocol, for example, acknowledgement (ACK) and negative acknowledgement (NACK) signaling. The TLPs that pass a CRC check and a sequence number check may result in an ACK, while those that fail these checks may result in a NACK. The TLPs that result in a NACK, or timeouts that occur while waiting for an ACK, may result in the TLPs being replayed from a special buffer in the transmit data path of the data link layer. The ACK and NACK signals may be communicated via a low-level packet known as a data link layer packet (DLLP). The DLLPs may be used to communicate flow control information between the transaction layers of two connected devices.
The PCIe may utilize a credit based flow control scheme, where a device may advertise an initial amount of credit for each of the receive buffers in its transaction layer. In this scheme, a device may advertise an initial amount of credit for each of the receive buffers in its transaction layer. The device at the opposite end of the link, when sending transactions to this device, may count the number of credits consumed by each TLP from its account. The sending device may only transmit a TLP when doing so does not result in its consumed credit count exceeding its credit limit. When the receiving device finishes processing the TLP from its buffer, it may signal a return of credits to the sending device, which may then increase the credit limit by the restored amount. The credit counters may be modular counters, and the comparison of consumed credits to the credit limit may require modular arithmetic. The advantage of this scheme compared to other methods such as wait states or handshake-based transfer protocols is that the latency of credit return does not affect performance, provided that the credit limit is not encountered, an assumption that is generally met if each device is designed with adequate buffer sizes.
Ethernet is a IEEE standard for simple packet networks including PHY, MAC, and switching services. Ethernet also provides data integrity coverage using a 32-bit CRC for each packet, which may be upgraded up to 1522 B long. When Ethernet networks detect a CRC error, they may drop the packet.
Ethernet networks often carry packets of higher level protocols such as IETF protocols IP, UDP, and TCP. The TCP protocol, for example, provides reliable delivery of data across Ethernet networks by detecting dropped frames and requesting retransmission of the dropped frames.
A plurality of check value types may be used to check data integrity. For example, parity check across each word of a transfer may be performed. The coverage of a parity check may be limited to each word of the transfer covered by its corresponding parity bit. For example, RS-232 may employ a single parity bit that covers a 7-bit or 8-bit character. The parity bit allows signal bit errors to be detected within each word. The error checking correcting code (ECC) used on memory interfaces may be able to detect more errors per word, but may also be limited to a single word. When the data to be transferred comprises a plurality of words, parity and ECC techniques may not be able to detect whether words have been added or removed from the packet or whether words have been moved within the packet or whether words have been swapped between two different packets. To detect these types of errors, a longitudinal check such as a checksum or cyclic redundancy checks (CRC) maybe required. The longitudinal checks may be grouped into associative checks and non-associative checks. Associative checks may be calculated over different parts of the packet and later combined. The parts may not be required to be processed in a specific order.
The checksum is an example of an associative longitudinal check. A checksum may be a 2's compliment or 1's compliment sum of the data. The checksum allows the detection of added or removed data or it may detect multiple bit errors. The checksum may detect data that has been swapped between packets. A checksum may not be able to detect data re-ordered within a packet as the operation is associative, for example, A+B+C==C+B+A.
While certain types of data corruption cannot be detected with a checksum, it has the advantage of being able to be calculated in parts and later combined to create the final checksum. It also allows data within the packet to be modified by making a matching correction in the checksum value. The CRC is a type of non-associative longitudinal check. A CRC may hash the data using a large number of conditional XOR functions between specific bits in the data value that allows the order of data entering the calculation to be verified. An example of a non-associative check may be, for example, (A^B)^((A^B)?C:˜C)< >(C^B)^((C^B)?A:˜A. A change in the order of the data may be detected with such a non-associated check. This also prevents the modification of data within a packet without making the check value invalid.
PCIe and Ethernet may have chosen a non-associated CRC check value because it can detect more types of corruption and this protection may be needed to detect errors caused by network media and PHY errors. The TCP protocol may choose the associative 1's compliment checksum check value as the associative features of the calculation may allow efficient calculation in software networking stacks.
Cyclic redundancy may be utilized to code information for transmission so that at least some errors may be detected and/or corrected. A cyclic redundancy check (CRC) may be computed for a group or block of bits referred to as frames. The computed CRC may then be appended to each frame for which a CRC is computed and the frame with the CRC may be transmitted. The appended CRC may be referred to as a frame check sequence (FCS). On the receive side, the frame check sequence may be extracted from the received information and a CRC may be computed for the received information. This calculated CRC of the received frame may then be compared with the frame check sequence and if there is a mismatch, then the received frame may be in error.
CRC utilizes very little overhead and may be easily implemented. Many conventional devices currently use CRC to determine if there is an error in information that has been received from a transmitting entity. For example, a receiver may be enabled to determine a CRC on frames in a payload of a received packet. The computed CRC may be compared with a FCS to determine whether the frame is in error. If the frame is determined to be in error and the error may be corrected, then the frame may be acknowledged or passed on for higher level processing. If the frame is in error and the error may not be corrected, then the receiver may either drop the frame which may cause higher level processing to request re-transmission or send an indication or a signal such as a negative acknowledgement, thereby more directly causing the packet to be retransmitted by the transmitter.
The strength of any check value may be measured by the way it covers the data, for example, CRC or checksum value or parity check strength may be related to the ratio of check value size in bits to the data frame size in bits. For example, Ethernet supports a 1500 byte (B) maximum frame size and a 32-bit CRC which may set a minimum check size to data size ratio and a certain protection level. For example, while a small file might be contained in a single Ethernet frame that may be 200 bytes long and have a higher check size to data size ratio, a large file may be split across many Ethernet packets, where each packet may have its own check value. The check size to data size ratio may be a maximum of 1500 B:4 B ratio for Ethernet. The advantage of this segmentation may be more consistent protection, and may allow parts of a large file to be retransmitted when there is an error rather than retransmitting the whole file. The network overhead for error recovery or retransmission may be reduced and the time delay the user experiences during error recovery may be reduced. The same segmentation may be applied to a checksum check similar to TCP.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.